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Sager 9750, ICS953201 FSB overclocking

This article explains how to overclock the FSB on Clevo D900K derived models like the Alienware M7700, the Sager NP9750, and the Eurocom F-Bomb.

This technique is NOT for the faint-of-heart. You will be playing around with the frequency generator on your motherboard. Frequency=Heat and Heat=Damage. Be careful. If you fry your electronics, I will not be able to help.

I’ve become pretty familiar with my Sager 9750 laptop over the past 5 years. Check out my YouTube videos in which I reconstruct it:



I purchased it with a lesser processor rather than stump the cash for the top of the line CPU, but I remedied that last year by purchasing an Athlon FX60 off of eBay.

So all that remains to improve this machine would be to purchase the GeForce Go 7950 GTX 512Mb video card, which is rare and still pricey.

One thing that’s been bugging me about these custom laptops (even, most laptops), is the inflexibility of the BIOS. There are zero overclocking options available. Here’s what I would alter, if I could:

* The FSB (using tools like SetFSB , and ClockGen)
* The CPU multiplier
* The memory interface (which I have done by writing updates to the SPD data on one of my memory chips to lower the CAS to 2.5 ( causing the BIOS to auto-select DDR800 ), using SPDTool )

This article covers altering the FSB.

Unfortunately to alter the FSB requires software that understands the specific clock generator hardware integrated into the motherboard. For the Sager 9750 D900K, the tools I mention above do not recognize the model present.

So let’s get down and dirty with with some schematics!

From the Clevo D900K Sager NP9750 Service Manual, skip to page 55 which details the schematic for the clock generator just as it is wired on the motherboard:

Clock Generator Schematic, ICS953201

Our first bit of useful information is written directly under the chip representation, it’s model – an ICS953201. Each clock generator IC has an SMBUS (I2C) interface, but uses different registers necessitating specific drivers for each chip. While there is great software out there, none of the applications I located could supports this specific clock generator.

ClockGen would happily read the following string of bytes directly off of the SMBus, without needing to know the specific clock generator IC:

73 00 FF FF FF 08 F7 21 0F 07 00 CE 76 0E 30

I poked 80 into the first byte and it happily locked up the computer. Obviously, I need to work smarter!

Sadly, it’s several years on, and the chip has since been discontinued by the manufacturer, Integrated Device Technology. I was unable to find a datasheet on their web site or on the wider web.

Referring to the schematic again, the handy clock generator table indicates that FS[4:0] should be set to 10011 (in binary) by default for the 200Mhz bus.

For the following experimentation, I used Read-Write Everything 1.4.7. Click the waveform icon for access to the clock generator.

Read Write Everything UI

Let’s take a look at the SMBus data again, this time in binary:

|   73    |   00    |   FF    |   FF    |   FF    |   08    |   F7    |   21    |   0F    |   07    |   00    |   CE    |   76    |   0E    |   30    |
|  7 | 3  |  0 | 0  |  F | F  |  F | F  |  F | F  |  0 | 8  |  F | 7  |  2 | 1  |  0 | F  |  0 | 7  |  0 | 0  |  C | E  |  7 | 6  |  0 | E  |  3 | 0  |
|0111|0011|0000|0000|1111|1111|1111|1111|1111|1111|0000|1000|1111|0111|0010|0001|0000|1111|0000|0111|0000|0000|1011|1110|0111|0110|0000|1110|0011|0000|

I can see 10011 in two places – in the first byte, and crossing the least significant nibble of the byte at index 11 (CE) and the most significant of the one at index 12 (76). Great! Only two possibilities (assuming the lines aren’t distributed over multiple registers… ).

Since I do not want to be rebooting the machine every time something goes wrong, I choose a safe, but noticeable increase in the clock rate. From the table in the schematics:

FS[4:0]:= 01001 will give me a 202Mhz core clock, 101Mhz PCIExpress, 67.33Mhz AGP, and 33.67Mhz PCI.

I use CPU-Z to watch the clock rate and see if it changes.

Attempting to write the CE 76 bits is a failure – a refresh shows that the changes didn’t take. But at least no crash! Writing the initial byte is only slightly more successful. The change took, and the machine did not crash. but the clock rate did not change.

|   73    |      |   69    |
|  7 | 3  |  =>  |  6 | 9  |
|0111|0011|      |0110|1001|

Time to hit the datasheets! As I’ve said, I do not have the datasheets for this chip, but the datasheets for another chip from IDT, or IDT’s other motherboard clock chips, tell an interesting story. On page 10, we see that Byte 0 bit 7 is the ‘FS’ (Frequency Select, I’m sure) Source flag – either Latched Input (0) or SMBus (1). Latched Input means using the hard-wired pin outs on the clock generator IC.

Sure enough, we can see in the binary above that the first byte, 73, has a zero initial bit.

Using RW-Everything, I set this bit as well as what I believe to be the clock rate FS flags:

|   73    |      |   E9    |
|  7 | 3  |  =>  |  E | 9  |
|0111|0011|      |1110|1001|




Hurray! CPU-Z instantly reports the increase in the CPU clock from 1200Mhz to 1212Mhz (CPU multiplier is 6 when the processor is not under load).

So folks, in summary, using RW Everything, use the table from the schematic, and update the bits in byte 0 of the clock generator registers to your desired frequency. Your mileage may vary, depending on your video card, memory, and processor. Reminder; you can destroy your hardware attempting this. If your system locks up, turn it off immediately. Listen to your fans. To do any more significant overclocking, it may be necessary to tune the CPU multiplier downwards.

If I discover how to do that on this machine, I’ll be sure to let you know right here!